I2c Overview -

The master pulls the SDA line low while SCL remains high.

Multiple masters can control the same slave, and multiple slaves can reside on the same bus.

The master sends the 7-bit unique address of the target slave, followed by a R/W bit (0 for write, 1 for read). I2C Overview

Each slave device has a unique 7-bit (or 10-bit) address, eliminating the need for complex Chip Select (CS) lines used in SPI.

The slave device with the matching address responds with an Acknowledge (ACK) bit (low), signaling it is ready, or a Not Acknowledge (NACK) bit (high). The master pulls the SDA line low while SCL remains high

I2C communication is master-controlled. The master initiates, manages, and terminates communication, generating the clock signal.

SDA and SCL are connected to a voltage source via pull-up resistors, allowing devices to pull the lines low without creating short circuits. Each slave device has a unique 7-bit (or

Uses a Serial Data Line ( SDA ) and a Serial Clock Line ( SCL ).